Brand Name Only: Field Programmable Gate Arrays (FPGA) boardview on SAM.gov

This is a request for a Firm Fixed Price quotation for commercial products. This solicitation is issued in accordance with the Revolutionary FAR Overhaul (RFO) Part 12 - Acquisition of Commercial Products and Commercial Services as supplemented with additional information included in this notice. This solicitation is a Request for Quotation (RFQ). The solicitation document and incorporated provisions and clauses are those in effect through the RFO. The associated North American Industrial Classification System (NAICS) code for this procurement is 344419 - Other Electronic Component Manufacturing. The small business size standard of 750 employees. This is an unrestricted competition. Both other than small businesses and small businesses under the applicable NAICS code are eligible to respond. DESCRIPTION OF REQUIREMENTS Non-Competitive (Single-sole Source (Including Brand-Name)) Determination: The purpose of this acquisition is to obtain a field-programmable gate array (FPGA) (AMD Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit, EK-U1-ZCU111-G) board that can be used in the NIST ITL's quantum network testbed to measure and forward information based on detection events with extremely low latency. Quantum information routing and detection in deployed optical fibers require state-of-the-art FPGAs to be able to process single-photon detection information and make decisions that are comparable with the speed of light in optical fibers. This is a brand name request, as ITL requires this specific evaluation board to be compatible with software that has already been written and developed by our PML colleagues. All FPGAs are different and require device-specific programming and configuration. NIST ITL has an existing software library that was previously developed by a NIST PML postdoctoral researcher. The software library was specifically written for the AMD Zynq platform and took two years to develop. Since these libraries are specifically written and optimized for the AMD Zynq system, any other platform would require a rewrite of the existing libraries, which would take about one full year in FTE. Utilizing this library will reduce development time and risk while supporting compatibility with the required FPGA platform. Failure to acquire this specific FPGA will result in non-compatible systems, and excessive costs related to developing new software and operating conditions. Objectives The purpose of this acquisition is to obtain a brand name only FPGA evaluation board to measure and forward information based on detection events with extremely low latency. Scope of Work Please see the attached Requirements Document. PERIOD OF PERFORMANCE / DELIVERY REQUIREMENTS The Contractor shall deliver all requirements within 3 months after receipt of order. All required items shall be delivered FOB Destination. CONTRACT TYPE & PAYMENT TERMS A firm fixed price purchase order is anticipated. APPLICABLE PROVISIONS AND CLAUSES Please see the attached document for ap…